Thermal Modeling and Device Noise Properties of Three-Dimensional-SOI Technology

Thermal test structures and ring oscillators (ROs) are fabricated in 0.18-mum three-dimensional (3-D)-SOI technology. Measurements and electrothermal simulations show that thermal and parasitic effects due to 3-D packaging have a significant impact on circuit performance. A physical thermal model is...

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Bibliographic Details
Main Authors: Chen, Tze Wee (Author), Chun, Jung-Hoon (Author), Lu, Yi-Chang (Author), Navid, Reza (Author), Wang, Wei (Author), Chen, Chang-Lee (Contributor), Dutton, Robert W. (Author)
Other Authors: Lincoln Laboratory (Contributor)
Format: Article
Language:English
Published: Institute of Electrical and Electronics Engineers, 2010-03-09T18:25:46Z.
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