|
|
|
|
LEADER |
01373 am a22002173u 4500 |
001 |
59812 |
042 |
|
|
|a dc
|
100 |
1 |
0 |
|a Gogineni, Usha
|e author
|
100 |
1 |
0 |
|a Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
|e contributor
|
100 |
1 |
0 |
|a del Alamo, Jesus A.
|e contributor
|
100 |
1 |
0 |
|a Gogineni, Usha
|e contributor
|
100 |
1 |
0 |
|a del Alamo, Jesus A.
|e contributor
|
700 |
1 |
0 |
|a del Alamo, Jesus A.
|e author
|
700 |
1 |
0 |
|a Putnam, Christopher
|e author
|
700 |
1 |
0 |
|a Greenberg, David
|e author
|
245 |
0 |
0 |
|a Modeling frequency response of 65 nm CMOS RF power devices
|
260 |
|
|
|c 2010-11-04T15:02:06Z.
|
856 |
|
|
|z Get fulltext
|u http://hdl.handle.net/1721.1/59812
|
520 |
|
|
|a This paper presents a model for the frequency response of 65 nm RF power CMOS devices as a function of device width. We find that the cut-off frequency (f[subscript T]) and maximum oscillation frequency (f[subscript max]) decrease with increasing device width. Small-signal equivalent circuit extractions reveal that the main reason for the degradation in f[subscript T] and f[subscript max] is the presence of non-scalable parasitic resistances in the gate and drain of wide devices. Simplified expressions for f[subscript T] and f[subscript max] that include these parasitic effects have been derived and shown to be very accurate.
|
546 |
|
|
|a en_US
|
655 |
7 |
|
|a Article
|