CMOS photonic processor-memory networks

This paper presents a monolithically integrated dense WDM photonic network for manycore processors, optimized for loss and power footprint of optical components, which can achieve up to 10x better energy-efficiency and throughput than electrical interconnects.

Bibliographic Details
Main Authors: Stojanovic, Vladimir Marko (Contributor), Joshi, Ajay J. (Author), Batten, Christopher (Contributor), Kwon, Yong-Jin (Author), Beamer, Scott (Author), Chen, Sun (Contributor), Asanovic, Krste (Author)
Other Authors: Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science (Contributor)
Format: Article
Language:English
Published: Institute of Electrical and Electronics Engineers, 2011-03-24T13:41:50Z.
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