Bias-Stress Effect in Pentacene Organic Thin-Film Transistors

Bias-Stress Effect in Pentacene Organic Thin-Film Transistors

The effects of bias stress in integrated pentacene organic transistors are studied and modeled for different stress conditions. It is found that the effects of bias stress can be expressed in terms of the shift in applied gate voltage [DELTA]V for a given current. An empirical equation describing [D...

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Bibliographic Details
Main Authors: Ryu, Kevin K. (Contributor), Nausieda, Ivan A. (Contributor), He, David Da (Contributor), Akinwande, Akintunde Ibitayo (Contributor), Bulovic, Vladimir (Contributor), Sodini, Charles G. (Contributor)
Other Authors: Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science (Contributor), Massachusetts Institute of Technology. Microsystems Technology Laboratories (Contributor)
Format: Article
Language:English
Published: Institute of Electrical and Electronics Engineers, 2011-04-08T20:26:50Z.
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