An ultra-compact virtual source FET model for deeply-scaled devices: Parameter extraction and validation for standard cell libraries and digital circuits

An ultra-compact virtual source FET model for deeply-scaled devices: Parameter extraction and validation for standard cell libraries and digital circuits

In this paper, we present the first validation of the virtual source (VS) charge-based compact model for standard cell libraries and large-scale digital circuits. With only a modest number of physically meaningful parameters, the VS model accounts for the main short-channel effects in nanometer tech...

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Bibliographic Details
Main Authors: Mysore, Omar (Contributor), Yu, Li (Contributor), Wei, Lan (Contributor), Daniel, Luca (Contributor), Antoniadis, Dimitri A. (Contributor), Elfadel, Ibrahim M. (Author), Boning, Duane S. (Contributor)
Other Authors: Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science (Contributor), Massachusetts Institute of Technology. Microsystems Technology Laboratories (Contributor)
Format: Article
Language:English
Published: Institute of Electrical and Electronics Engineers (IEEE), 2014-12-22T15:27:22Z.
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