Modeling of power supply noise in large chips using the finite difference time domain method

Modeling of power supply noise in large chips using the finite difference time domain method

Bibliographic Details
Main Author: Choi, Jinseong
Published: Georgia Institute of Technology 2007
Subjects:
Electronic packaging Design and construction
Integrated circuits Design and construction
Electronic packaging Noise
Integrated circuits Noise
Switching circuits Noise
Switching circuits Design and construction
Online Access:http://hdl.handle.net/1853/14977

Internet

http://hdl.handle.net/1853/14977

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