Design and fabrication of free-standing structures as off-chip interconnects for microsystems packaging
It is projected by the Semiconductor Industry Association in their International Technology Roadmap for Semiconductors (ITRS) that by the year 2019, with the IC feature size shrinking to about 10nm, off-chip interconnects in an area array format will require a pitch of 95 µm. Also, as the industry a...
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Georgia Institute of Technology
2009
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| Online Access: | http://hdl.handle.net/1853/26464 |