Design for pre-bond testability in 3D integrated circuits
In this dissertation we propose several DFT techniques specific to 3D stacked IC systems. The goal has explicitly been to create techniques that integrate easily with existing IC test systems. Specifically, this means utilizing scan- and wrapper-based techniques, two foundations of the digital IC te...
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Georgia Institute of Technology
2013
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| Online Access: | http://hdl.handle.net/1853/45756 |