Built-in test for performance characterization and calibration of phase-locked loops
The objective of this dissertation is to propose circuit architectures and techniques for built-in test and calibration of phase-locked loops. The design of phase-locked loops is first investigated to achieve a robust performance over process, temperature, voltage corners with minimum overhead. Diff...
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| Format: | Others |
| Language: | en_US |
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Georgia Institute of Technology
2014
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| Online Access: | http://hdl.handle.net/1853/51790 |