High-performance memory system architectures using data compression

High-performance memory system architectures using data compression

The Chip Multi-Processor (CMP) paradigm has cemented itself as the archetypal philosophy of future microprocessor design. Rapidly diminishing technology feature sizes have enabled the integration of ever-increasing numbers of processing cores on a single chip die. This abundance of processing power...

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Bibliographic Details
Main Author: Baek, Seungcheol
Other Authors: Kim , Jongman Kim
Format: Others
Published: Georgia Institute of Technology 2014
Subjects:
Memory systems
Cache compression
Cache replacement
Hybrid DRAM/PCM
Data compression (Computer science)
High performance computing
Computer storage devices
Cache memory
Online Access:http://hdl.handle.net/1853/51863

Internet

http://hdl.handle.net/1853/51863

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