?Algoritmos e Arquiteturas VLSI para Detectores MIMO com Decis?o Suave

?Algoritmos e Arquiteturas VLSI para Detectores MIMO com Decis?o Suave

Made available in DSpace on 2015-03-03T15:08:47Z (GMT). No. of bitstreams: 1 JoseMLD_TESE.pdf: 1767414 bytes, checksum: b0bb7821ad5c80023e5752938c7e5922 (MD5) Previous issue date: 2012-08-17 === The use of Multiple Input Multiple Output (MIMO) systems has permitted the recent evolution of wirel...

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Bibliographic Details
Main Author: Duarte, Jos? Marcelo Lima
Other Authors: CPF:09612890404
Format: Others
Language:Portuguese
Published: Universidade Federal do Rio Grande do Norte 2015
Subjects:
MIMO
detecc?o
demodulac?o
processamento digital de sinais
arquitetura
VLSI
ASIC
FPGA
detection
demodulation
digital signal processing
architecture
CNPQ::ENGENHARIAS::ENGENHARIA ELETRICA
Online Access:http://repositorio.ufrn.br:8080/jspui/handle/123456789/18575

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http://repositorio.ufrn.br:8080/jspui/handle/123456789/18575

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