Desenvolvimento de uma metodologia de inje??o de falhas de atraso baseada em FPGA
Made available in DSpace on 2015-04-14T13:56:29Z (GMT). No. of bitstreams: 1 453332.pdf: 3256943 bytes, checksum: 802e693c7d7f8218ab7cad817e183d79 (MD5) Previous issue date: 2013-04-10 === With the evolution of CMOS technology, density and proximity between routing lines of integrated circuits (IC...
| Main Author: | |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | Portuguese |
| Published: |
Pontif?cia Universidade Cat?lica do Rio Grande do Sul
2015
|
| Subjects: | |
| Online Access: | http://tede2.pucrs.br/tede2/handle/tede/3057 |