Núcleos IP corretores de erros para proteção de memória em SoC
Made available in DSpace on 2013-08-07T18:53:02Z (GMT). No. of bitstreams: 1 000407756-Texto+Completo-0.pdf: 1790642 bytes, checksum: 336376143b2d186c09e1cfa0d540851d (MD5) Previous issue date: 2008 === The constant technology process improvement has remarkably reduced the transistor geometry and...
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| Language: | Portuguese |
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Pontifícia Universidade Católica do Rio Grande do Sul
2013
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| Online Access: | http://hdl.handle.net/10923/3145 |