Sub-Threshold Slope Modeling & Gate Alignment Issues In Tunnel Field Effect Transistor
The Tunnel Field Effect Transistor (TFET) with sub-60mV/decade Sub-threshold slope and extremely high ION/IOFF ratio has attracted enough attention for low standby power (LSTP) applications where the battery life is very important. So far research in this area has been limited to numerical simulatio...
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Language: | en_US |
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2010
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Online Access: | http://hdl.handle.net/2005/792 |