Development and Analysis of Integrated Circuit Topology Element Recognition System

Development and Analysis of Integrated Circuit Topology Element Recognition System

Integrated circuit (IC) layer topology analysis methods are the main research topic of this doctoral thesis. Multiple methods are presented for IC layer feature analysis along with a software system where they are implemented and tested. Each of different IC layers has distinct features therefore...

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Bibliographic Details
Main Author: Masalskis, Giedrius
Other Authors: Martavičius, Romanas
Format: Doctoral Thesis
Language:English
Published: Lithuanian Academic Libraries Network (LABT) 2011
Subjects:
Electronics and Electrical Engineering
Integrated circuits
Defect detection
Verification
Segmentation
Reverse engineering
Integriniai grandynai
Defektų patikra
Verifikavimas
Segmentavimas
Atvirkštinis projektavimas
Online Access:http://vddb.laba.lt/fedora/get/LT-eLABa-0001:E.02~2011~D_20110125_093925-55797/DS.005.1.01.ETD

Internet

http://vddb.laba.lt/fedora/get/LT-eLABa-0001:E.02~2011~D_20110125_093925-55797/DS.005.1.01.ETD

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