Efficient self-timed interfaces for crossing clock domains
With increasing integration densities, large chip designs are commonly partitioned into multiple clock domains. While the computation within each individual domain may be synchronous, the interfaces between these domains often use asynchronous methods. One such approach is the STARI technique[Gre93,...
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| Language: | English |
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2009
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| Online Access: | http://hdl.handle.net/2429/14589 |