Enhanced Synchronous Design Using Asynchronous Techniques
As semiconductor technology scales down, process variations become increasingly difficult to control. To cope with this, more and more conservative delay and clock frequency estimations are used during design, which result in overly large and leaky circuits. Also, the system runs at a speed slower t...
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| Language: | en_ca |
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2010
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| Online Access: | http://hdl.handle.net/1807/24895 |