VLSI Implementation of Lattice Reduction for MIMO Wireless Communication Systems
Lattice-Reduction has become a popular way of improving the performance of MIMO detectors. However, developing an efficient high-throughput VLSI implementation of LR has been a major challenge in the literature. This thesis proposes a hardware-optimized version of the popular LLL algorithm that redu...
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Language: | en_ca |
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2010
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Online Access: | http://hdl.handle.net/1807/25529 |