A Framework for Noise Analysis and Verification of Analog Circuits
Analog circuit design and verification face significant challenges due to circuit complexity and short market windows. In particular, the influence of technology parameters on circuits, noise modeling and verification still remain a priority for many applications. Noise could be due to unwanted int...
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Format: | Others |
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2012
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Online Access: | http://spectrum.library.concordia.ca/973941/1/Thesis_Final.pdf Narayanan, Rajeev <http://spectrum.library.concordia.ca/view/creators/Narayanan=3ARajeev=3A=3A.html> (2012) A Framework for Noise Analysis and Verification of Analog Circuits. PhD thesis, Concordia University. |