Circuit design for embedded memory in low-power integrated circuits
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2012. === Cataloged from PDF version of thesis. === Includes bibliographical references (p. 141-152). === This thesis explores the challenges for integrating embedded static random access me...
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| Format: | Others |
| Language: | English |
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Massachusetts Institute of Technology
2012
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| Online Access: | http://hdl.handle.net/1721.1/75645 |