SiGe-on-insulator and strained-Si-on-insulator for strained-Si CMOS and nanocrystalline-Ge waveguides

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, 2003. === Includes bibliographical references (p. 191-201). === SiGe-on-insulator (SGOI) and strained-Si-on-insulator (SSOI) substrates combine both the benefits of a high-quality, monocrystalline SiG...

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Main Author: Taraschi, Gianni, 1973-
Other Authors: Eugene A. Fitzgerald.
Format: Others
Language:English
Published: Massachusetts Institute of Technology 2005
Subjects:
Online Access:http://hdl.handle.net/1721.1/7968
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language English
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topic Materials Science and Engineering.
spellingShingle Materials Science and Engineering.
Taraschi, Gianni, 1973-
SiGe-on-insulator and strained-Si-on-insulator for strained-Si CMOS and nanocrystalline-Ge waveguides
description Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, 2003. === Includes bibliographical references (p. 191-201). === SiGe-on-insulator (SGOI) and strained-Si-on-insulator (SSOI) substrates combine both the benefits of a high-quality, monocrystalline SiGe or strained-Si surface layer with the advantages of an insulating substrate. In particular, many electronic and photonic devices are greatly enhanced by the use of such substrates. In this thesis, techniques were developed for the fabrication of SGOI and SSOI substrates for applications including strained-Si complementary metal-oxide-semiconductor (CMOS) field-effect transistors, and nanocrystalline-Ge waveguides and photonic devices. A versatile fabrication technique was pioneered for the fabrication of low defect density SGOI and SSOI substrates, allowing for the creation of ultra-thin SGOI and SSOI, combining both the benefits of high-mobility strained-Si and SOI. The method pioneered employed wafer bonding of polished, relaxed SiGe virtual substrates to oxidized handle wafers. Layer transfer onto insulating handle wafers was accomplished using grind-etchback or delamination via implantation. Both methods were found to produce a rough transferred layer, but chemical mechanical polishing (CMP) was found to be unacceptable due to non-uniform material removal across the wafer and the lack of precise control over the final layer thickness. To solve these problems, a strained-Si stop layer was incorporated into the bonding structure. After layer transfer, excess SiGe was removed using a selective etch process, stopping on the strained-Si. Within the context of ultra-thin SGOI and SSOI fabrication, this work describes recent improvements including metastable stop layers, low- temperature wafer bonding, and improved selective SiGe removal. Such ultra-thin SSOI substrates are ideal for fully-depleted CMOS, in comparison to some thicker SGOI substrates that were fabricated, which are required for partially-depleted CMOS. SGOI substrates can also be used as a platform for novel photonic devices. In this work, one such example is presented, whereby nanocrystalline-Ge waveguides were fabricated using SGOI substrates. These waveguides contained Ge nanocrystals embedded in an oxide matrix and isolated from the underlying Si substrate by a buried silicon dioxide layer. Fabrication challenges revolved around the instability of SiGe- oxide, which was required as an initial material for the nanocrystalline-Ge fabrication === (cont.) process. Nanocrystals were formed via the reduction of SiGe-oxide by annealing in a hydrogen ambient. Resulting nanocrystalline-Ge distributions were mapped as a function of hydrogen partial pressure, annealing temperature, and time. Based on these results, the process kinetics of the nanocrystal formation process was deduced, and a mathematical model was created based on the observations. Simulations generated predictions for nanocrystalline density as a function of temperature and hydrogen pressure which were consistent with experimental results. Based on the demonstrations in this thesis, SGOI and SSOI were shown to be enhanced platforms for microelectronic and photonic devices. With the advent and development of the general wafer bonding method presented in this work, these substrates may serve as platforms for a multitude of future novel applications. === b y Gianni Taraschi. === Ph.D.
author2 Eugene A. Fitzgerald.
author_facet Eugene A. Fitzgerald.
Taraschi, Gianni, 1973-
author Taraschi, Gianni, 1973-
author_sort Taraschi, Gianni, 1973-
title SiGe-on-insulator and strained-Si-on-insulator for strained-Si CMOS and nanocrystalline-Ge waveguides
title_short SiGe-on-insulator and strained-Si-on-insulator for strained-Si CMOS and nanocrystalline-Ge waveguides
title_full SiGe-on-insulator and strained-Si-on-insulator for strained-Si CMOS and nanocrystalline-Ge waveguides
title_fullStr SiGe-on-insulator and strained-Si-on-insulator for strained-Si CMOS and nanocrystalline-Ge waveguides
title_full_unstemmed SiGe-on-insulator and strained-Si-on-insulator for strained-Si CMOS and nanocrystalline-Ge waveguides
title_sort sige-on-insulator and strained-si-on-insulator for strained-si cmos and nanocrystalline-ge waveguides
publisher Massachusetts Institute of Technology
publishDate 2005
url http://hdl.handle.net/1721.1/7968
work_keys_str_mv AT taraschigianni1973 sigeoninsulatorandstrainedsioninsulatorforstrainedsicmosandnanocrystallinegewaveguides
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spelling ndltd-MIT-oai-dspace.mit.edu-1721.1-79682019-05-02T15:51:37Z SiGe-on-insulator and strained-Si-on-insulator for strained-Si CMOS and nanocrystalline-Ge waveguides Taraschi, Gianni, 1973- Eugene A. Fitzgerald. Massachusetts Institute of Technology. Dept. of Materials Science and Engineering. Massachusetts Institute of Technology. Dept. of Materials Science and Engineering. Materials Science and Engineering. Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, 2003. Includes bibliographical references (p. 191-201). SiGe-on-insulator (SGOI) and strained-Si-on-insulator (SSOI) substrates combine both the benefits of a high-quality, monocrystalline SiGe or strained-Si surface layer with the advantages of an insulating substrate. In particular, many electronic and photonic devices are greatly enhanced by the use of such substrates. In this thesis, techniques were developed for the fabrication of SGOI and SSOI substrates for applications including strained-Si complementary metal-oxide-semiconductor (CMOS) field-effect transistors, and nanocrystalline-Ge waveguides and photonic devices. A versatile fabrication technique was pioneered for the fabrication of low defect density SGOI and SSOI substrates, allowing for the creation of ultra-thin SGOI and SSOI, combining both the benefits of high-mobility strained-Si and SOI. The method pioneered employed wafer bonding of polished, relaxed SiGe virtual substrates to oxidized handle wafers. Layer transfer onto insulating handle wafers was accomplished using grind-etchback or delamination via implantation. Both methods were found to produce a rough transferred layer, but chemical mechanical polishing (CMP) was found to be unacceptable due to non-uniform material removal across the wafer and the lack of precise control over the final layer thickness. To solve these problems, a strained-Si stop layer was incorporated into the bonding structure. After layer transfer, excess SiGe was removed using a selective etch process, stopping on the strained-Si. Within the context of ultra-thin SGOI and SSOI fabrication, this work describes recent improvements including metastable stop layers, low- temperature wafer bonding, and improved selective SiGe removal. Such ultra-thin SSOI substrates are ideal for fully-depleted CMOS, in comparison to some thicker SGOI substrates that were fabricated, which are required for partially-depleted CMOS. SGOI substrates can also be used as a platform for novel photonic devices. In this work, one such example is presented, whereby nanocrystalline-Ge waveguides were fabricated using SGOI substrates. These waveguides contained Ge nanocrystals embedded in an oxide matrix and isolated from the underlying Si substrate by a buried silicon dioxide layer. Fabrication challenges revolved around the instability of SiGe- oxide, which was required as an initial material for the nanocrystalline-Ge fabrication (cont.) process. Nanocrystals were formed via the reduction of SiGe-oxide by annealing in a hydrogen ambient. Resulting nanocrystalline-Ge distributions were mapped as a function of hydrogen partial pressure, annealing temperature, and time. Based on these results, the process kinetics of the nanocrystal formation process was deduced, and a mathematical model was created based on the observations. Simulations generated predictions for nanocrystalline density as a function of temperature and hydrogen pressure which were consistent with experimental results. Based on the demonstrations in this thesis, SGOI and SSOI were shown to be enhanced platforms for microelectronic and photonic devices. With the advent and development of the general wafer bonding method presented in this work, these substrates may serve as platforms for a multitude of future novel applications. b y Gianni Taraschi. Ph.D. 2005-08-24T23:21:11Z 2005-08-24T23:21:11Z 2003 2003 Thesis http://hdl.handle.net/1721.1/7968 54769113 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 209 p. 19344063 bytes 19343818 bytes application/pdf application/pdf application/pdf Massachusetts Institute of Technology