Minimizing the risk qualification test wafers have on the manufacturing readings of a new microprocessor fabrication site through data processes

Thesis (S.M.)--Massachusetts Institute of Technology, Sloan School of Management; and, (S.M.)--Massachusetts Institute of Technology, Dept. of Mechanical Engineering, 2001. === Includes bibliographical references (p. 73). === by Jonathan E. Howe. === S.M.

Bibliographic Details
Main Author: Howe, Jonathan E. (Jonathan Emerson), 1973-
Other Authors: Stephen C. Graves and Stanley B. Gershwin.
Format: Others
Language:English
Published: Massachusetts Institute of Technology 2014
Subjects:
Online Access:http://hdl.handle.net/1721.1/84226