Reducing data movement in multicore chips with computation and data co-scheduling
Thesis: S.M., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2015. === Cataloged from PDF version of thesis. === Includes bibliographical references (pages 59-63). === Energy efficiency is the main limitation to the performance of parallel systems....
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| Format: | Others |
| Language: | English |
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Massachusetts Institute of Technology
2015
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| Online Access: | http://hdl.handle.net/1721.1/99839 |