Design of high-speed summing circuitry and comparator for adaptive parallel multi-level decision feedback equalization

Design of high-speed summing circuitry and comparator for adaptive parallel multi-level decision feedback equalization

Multi-level decision feedback equalization (MDFE) is an effective sampled signal processing technique to remove inter-symbol interference (ISI) from disk read-back signals. Parallelism which doubles the symbol rate can be realized by utilizing the characteristic of channel response and decision feed...

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Bibliographic Details
Main Author: Gao, Hairong
Other Authors: Allstot, David J.
Language:en_US
Published: 2012
Subjects:
Feedback control systems > Design and construction
Computer arithmetic
Parallel processing (Electronic computers)
Analog-to-digital converters
Online Access:http://hdl.handle.net/1957/34282

Internet

http://hdl.handle.net/1957/34282

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