Cluster assignment and instruction scheduling for partitioned register-set machines
For half a century, computer architects have been striving to improve uniprocessor computer performance. Many of their successful designs such as VLIW and superscalar machines use multiple functional units trying to exploit instruction level parallelism in computer programs. As the number of functi...
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| Format: | Others |
| Language: | English |
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2009
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| Online Access: | http://hdl.handle.net/1911/17340 |