Hardware thread scheduling algorithms for single-ISA asymmetric CMPs
Through the past several decades, based on the Moore's law, the semiconductor industry was doubling the number of transistors on the single chip roughly every eighteen months. For a long time this continuous increase in transistor budget drove the increase in performance as the processors conti...
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| Format: | Doctoral Thesis |
| Language: | English |
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Universitat Politècnica de Catalunya
2015
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| Online Access: | http://hdl.handle.net/10803/335270 |