Extraction and modelingof VLSI cell layout

Extraction and modelingof VLSI cell layout

碩士 === 國立臺灣大學 === 電機工程研究所 === 75 ===

Bibliographic Details
Main Authors:	YE, GUO-GU, 葉國富
Other Authors:	FENG, WU-XIONG
Format:	Others
Language:	zh-TW
Published:	1987
Online Access:	http://ndltd.ncl.edu.tw/handle/05122734310353080275

Internet

http://ndltd.ncl.edu.tw/handle/05122734310353080275