| Summary: | 碩士 === 國立交通大學 === 電子研究所 === 81 === In this thesis, the basic device physics of a buried chan- nel
n-MOSFET are described, which include the threshold-volta- ge
model and I-V characteristics. Based on these models, the
extraction methods for the device parameters including the de-
vice structure parameters and the material parameters are pre-
sented. The device structure parameters include effective cha-
nnel length, channel doping profile, and source/drain doping
profile and its junction depth. The material parameters inclu-
de the parameters in the mobility model. Using these extracted
parameters, we can simulate the electrical characteristics of
the fabricated buried channel n-MOSFET's by using a two-dimen-
sional numerical MOSFET simulator ( SUMMOS ). It is shown that
good agreements between simulation results and experimental
data are obtained for wide ranges of applied biases and chann-
el lengths. Based on the simulation, the drain-induced barrier
loweri- ng and punch-through effects of short-buried-channel
n-MOS- FET's are discussed, and the methods for improving
these short-channel effects are proposed.
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