A Routing Technique for RAM-Based FPGAs
碩士 === 國立清華大學 === 資訊科學學系 === 81 === In this thesis, we propose an efficient routing method for the design of RAM-based FPGAs. We model the interconnect resources as a graph, where each vertex represents either a CLB pin or a wiring segment,...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
1993
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| Online Access: | http://ndltd.ncl.edu.tw/handle/78847589320672694230 |