Transputer-based Parallel Matrix Multi-plication Programming and

碩士 === 國立海洋大學 === 電子工程學系 === 81 === This thesis is about the parallelization of matrix multiplication on various parallel architectures. We have configured these parallel architectures from a transputer network, including a linear array, a...

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Bibliographic Details
Main Authors: Hsin-Chi Pan, 潘信麒
Other Authors: Shao-Wei Lu
Format: Others
Language:zh-TW
Published: 1993
Online Access:http://ndltd.ncl.edu.tw/handle/71252817461929963545