A VLSI Design of Error-Correction Decoder for Digital VTR in D-3 Format
碩士 === 國立交通大學 === 電子研究所 === 82 === The error-correcting-codes(ECC) system contributes largely to the quality improvement in the new generation of video products. A high speed ECC system is implemented following the D-3 format for the televi...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
1994
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| Online Access: | http://ndltd.ncl.edu.tw/handle/01005490429652585332 |