Analysis and Design of a New EEPROM Device
碩士 === 國立交通大學 === 電子研究所 === 82 === In this thesis, a new EEPROM cell using the p-channel poly- Si TFT for erasure operation is proposed and analyzed. The TFT device is fabricated on the seond poly-silicon layer of conven- tional stacked-gat...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
1994
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| Online Access: | http://ndltd.ncl.edu.tw/handle/31337573063379854614 |