The fault-tolerant architectures of shared buffer memory switch
碩士 === 國立交通大學 === 電子研究所 === 82 === In the thesis, we investigate the fault-tolerant architectures of Shared Buffer Memory Switch(SBMS). The original SBMS proposed by Hitachi Ltd is based on single linked list to attain buffer management. Ho...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
1994
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| Online Access: | http://ndltd.ncl.edu.tw/handle/11046793870788185034 |