The Researches on CMOS Transient Latchup and On-Chip Electrostatic Discharge Protection Circuits
博士 === 國立交通大學 === 電子研究所 === 82 === This dissertation includes two parts. The first part is the physical analysis of the CMOS transient latchup in the parasitic p-n-p-n path of CMOS ICs. The second part is the application of SCR devices on the ElectroStati...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
1993
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| Online Access: | http://ndltd.ncl.edu.tw/handle/92150617439744004062 |