| Summary: | 碩士 === 國立清華大學 === 材料科學(工程)研究所 === 82 === Wafer bonding is an attractive technique for silicon-on-
insulator (SOI) structure. To apply this method to SOI
structure, it is very important to obtain void-free interface.
Two sufficiently flat, smooth, particle-free, and high
hydrophilic surfaces are contacted for silicon wafer bonding at
room temperature without using any external force. Then the
bonded wafers are loaded into a furance at temperature 1050 ℃
in a nitrogen atmo- sphere and stayed them for 1.5-2 hours to
prompt the bonding strengh. Basically, The SOI wafer is
fabricated by four basic process steps. The first step is to
achieve a sufficiently flat, smooth, particle-free, and
hydrophilic surface by a number of wet chemical cleaning
processes. The second step is the mating of two wafers together
at room temperature without using any external force. The third
step consists of the annealing over 800 ℃ (usually 1000-1100
℃ used) to increase the bond strengh. The four step is to thin
down one of the two wafers to an appro- priate thickness by
grinding, lapping, polishing, and etching. Our experiments
focus on the first three steps. The local bonded structure was
characterized by cross-sectional transmission electron micro-
scopy (XTEM). Surface chemical conditions of silicon and
silicon dioxide after wet cleaning were investigated by Fourier
tranformation in- frared ray (FT-IR) spectroscopy, including
trans- mission and attenuated total reflection methods. Surface
micro-roughness of silicon and silicon dioxide after wet
cleaning was observed by atomic force microscopy (AFM). The
distribution of dust particles on wafer surfaces after cleaned
by the solutions was studied by surface scan microscopy (SSM).
The presence of voids at bonded interfaces prepared after
hydrophilizing surface treatment have previously been
demonstrated by using a transmission infrared ray image system.
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