FPGA Design for Second and Third Order Digital Multiplexer
碩士 === 國立中正大學 === 電機工程研究所 === 83 === The second order digital Multiplexers of ME12 and M12E and third order digital Multiplexer of M23E circuit designs are des- cribed in this thesis. ME12 is a Multiplexer which interleaves up to three ples...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
1995
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| Online Access: | http://ndltd.ncl.edu.tw/handle/19630033669525413035 |