A study of chemical mechanical polish planarization technology to VLSI
碩士 === 國立交通大學 === 電子研究所 === 83 === As VSLI devices are scaled down to ever smaller dimen- tion. The chip size is not only getting smaller but also actually increasing in quantity for each device generation. Then multilayer of metallization...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
1995
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| Online Access: | http://ndltd.ncl.edu.tw/handle/70855654955694747676 |