Analysis and design of CMOS capacitor-coupled electrostatic discharging (ESD) protection circuit
碩士 === 國立交通大學 === 電子研究所 === 83 === An electrostatic discharging (ESD) protection circuit using the capacitor-coupled technique is proposed in this thesis. In protection circuit, the capacitor-coupled technique is utlized not only to lower the snap...
Main Authors: | , |
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Other Authors: | |
Format: | Others |
Language: | en_US |
Published: |
1995
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Online Access: | http://ndltd.ncl.edu.tw/handle/59964843371468245198 |