CMOS Limiting Amplifier for SONET OC-3
碩士 === 國立中央大學 === 電機工程研究所 === 83 === A limiting amplifier for SONET OC-3 is designed and laid out by using UMC 0.8um DPDM 5V CMOS technology. The limiting amplifier has an access time of 7.5ns and an input dynamic ra- nge of 50dB....
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
1994
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/14210538027400804941 |