The Design of Parallel CMAC Neural Network Controller via FPGA chips

碩士 === 國立交通大學 === 控制工程系 === 84 === The object of this thesis is to build the CMAC controller with parallel computing capability via FPGA chip. This CMAC control system combines parallelly the tranditional PD controller and the CMAC contoller. We use the C...

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Bibliographic Details
Main Authors: Wu, Shiow-Fang, 吳秀芳
Other Authors: Fu-Chuang Chen
Format: Others
Language:zh-TW
Published: 1996
Online Access:http://ndltd.ncl.edu.tw/handle/40817206235359288769
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Summary:碩士 === 國立交通大學 === 控制工程系 === 84 === The object of this thesis is to build the CMAC controller with parallel computing capability via FPGA chip. This CMAC control system combines parallelly the tranditional PD controller and the CMAC contoller. We use the CMAC controller to improve existing nonlinear control systems. In this paper, we use SIMD computation architecture and the FPGA chips to solve the problem in the simultaneous fetch and store of the data.The CMAC controller designed has the ability to fetch or store two data simultaneously. First, we transform the generalition algorithm proposed by D.Ellision into physical circuits. We also determine the specifications and parameters the circuits. Then we implement CMAC by three FPGA chips and six 32k×8 SRAMs. The FPGA chips are for the computation of the CMAC neural network. The SRAMs store the weights of the CMAC neural network. Secondly, we implement the PD controller by 8051 single-chip computer. Then, we integrate the PD controller,the CMAC controller,the HCTL-2016 and the AD7541A to construct the overall CMAC control system. Finally, we apply the CMAC control system to control the DC servomotor to verify our hardware and software design .