Memory latency reduction in loop scheduling on modern multiprocessors
博士 === 國立交通大學 === 資訊科學學系 === 84 === Loop scheduling is one of the most important issues in the development of parallelizing complier on shared memory multiprocessors. In this thesis, we propose loop scheduling algorithms for shared memory multiprocessors...
| Main Authors: | , |
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| Format: | Others |
| Language: | en_US |
| Published: |
1996
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| Online Access: | http://ndltd.ncl.edu.tw/handle/18178780178034759400 |