Design and Implementation of Cost Effective Memory Management for MPEG2 Video Compression
碩士 === 國立交通大學 === 電子研究所 === 84 === In this thesis, VLSI architectures are proposed for encoder and decodermemory management design targeted to real-time MPEG2 MP@ML. The architectureof decoder is a programmable design which provides mor...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
1996
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/29393931276688519914 |