A Design Methodology for Flash EEPROM Memory Device
碩士 === 國立交通大學 === 電子研究所 === 84 === A design methodology for high-speed and high-reliable flash EEPROM is presented in this thesis. By modifying a 1-D substrate injection model, agate injection probability model for 2-D numerical analys...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
1996
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| Online Access: | http://ndltd.ncl.edu.tw/handle/06876517035184081031 |