| Summary: | 博士 === 國立交通大學 === 電子研究所 === 84 === This dissertation presents newly-developed profiling
methods and an analytical linear drain current degradation
model to analyze hot-electron-induced oxide damages (inter-
face trap generation and fixed oxide charge trapping) and
the associated device degradation mechanisms in LDD
n-MOSFET''s. Several time-evolutional oxide damage profiling
techniques based on charge pumping measurements in combi-
nation with power-law dependence of such damages on stress
time were developed. These methodologies can be easily pro-
grammed into existing simulation frameworks, while with
less experimental efforts as compared to the previously
proposed ones. In addition, hot carrier stress was performed
on devices with various gate oxide thicknesses. It is seen
that the thinner the gate oxide thickness, the larger the
device degradation. Thus, a generalized model of linear
drain-current degradation by incorporating the gate-electric
-field, namely, series resistance increase and channel
length modulation, is developed. This model is well-suited
for both conventional and LDD MOS devices. By using this
developed model, the current degradation can be predicted
with excellent accuracy both quantitatively and quali-
tatively in comparison with experimental data for a wide
range of gate-bias and oxide-thickness conditions. These
achievements can provide us useful information for degra-
dation mechanisms and design guideline of device optimi-
zation.
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