VLSI DESIGN OF TIMING RECOVERY AND FREQUENCY OFFSET COMPENSATION CIRCUIT FOR TDMA DIGITAL MOBILE RADIO
碩士 === 國立交通大學 === 電子研究所 === 84 === In digital communications, correct timing is necessary to reduce the ISI in the receiver. We adopt a timing recovery scheme using the Gardner''s timing error detector, a novel digital loop filter and a digital...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
1996
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| Online Access: | http://ndltd.ncl.edu.tw/handle/87955198202932980307 |