A Hierarchical-Search Block Matching Motion Estimation Processor
碩士 === 國立交通大學 === 電子工程學系 === 85 === In this thesis, a VLSI architecture for motion estimation baed on a hierarchical-search block matching algorithm (HSBMA) is developed. The proposed architecture can deal with the full- search block matc...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
1997
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| Online Access: | http://ndltd.ncl.edu.tw/handle/14184443855276779465 |