The Impact of Back-Gate Bias on Gate current Injection in Submicron MOSFET's
碩士 === 國立交通大學 === 電子工程學系 === 85 === This thesis extensively explores the gate current by channel initated secondary electron injection(CISEI) in 0.35um gate length n-type LDD MOSFET's.The CISEI mechanism is observed to dominate...
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Other Authors: | |
Format: | Others |
Language: | zh-TW |
Published: |
1997
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Online Access: | http://ndltd.ncl.edu.tw/handle/82783093785235778755 |
Summary: | 碩士 === 國立交通大學 === 電子工程學系 === 85 === This thesis extensively explores the gate current by channel
initated secondary electron injection(CISEI) in 0.35um
gate length n-type LDD MOSFET's.The CISEI mechanism is observed
to dominate the gate current especially at low supply voltage
operation, and is found to be a strong function of back gate
bias. A new analytic model has been for the first time developed
and has successfully reproduced all experimental data from
three different device sizes each at different bias
conditions. This model also provides a transparent
understanding of the CISEI mechanism: the channel electrons
impactionize the lattice and create the holes flowing down to
the substrate; then secondary electrons are generated via
impact ionization by these holes and feed back to the surface
beneath gate; simultaneously the secondary electrons gaining the
energy from the back-gate bias induced vertical field as well as
from the pinch-off lateral field, enough to overcome the Si/SiO2
barrier height and constitute the gate current. This model
can further serve as a useful tool for low voltage
nonvolatile memory device design.
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