A study of TDDB nd latch-up in deep submicron CMOS
碩士 === 國立交通大學 === 電子工程學系 === 85 === TDDB and latch-up in deep submicron CMOS are studied in this thesis. TDDB is discussed in the Part A with emphasis on developing a simulator for instrinsic and B-mode oxide failures. The Part B inves...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
1997
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| Online Access: | http://ndltd.ncl.edu.tw/handle/00414783755408597249 |
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