VLSI Architecture Designs of Grey Model
碩士 === 國立台灣工業技術學院 === 電機工程技術研究所 === 85 === The thesis propose a hardware architecture to eliminate the bottleneck of grey model construction and prediction. To solve the problem of applying grey model in some real-time systems, we prese...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
1997
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/35563440049948740253 |