| Summary: | 碩士 === 長庚大學 === 電機工程研究所 === 86 === A novel structure of low noise MOSFET, which is completely compatible with the conventional MOSFET structure is proposed in this thesis. In the proposed low noise structure, an overlaid metal gate is used and overlaid directly on the conventional poly-Si gate to reduce the gate resistance and noise figure of device. A 200mm overlaid metal gate MOSFET is design and fabricate by TSMC 0.6um process. The measurement shows the noise figure of over-laid metal gate MOSFET is 1dB lower than traditional MOSFET in the commonly used commercial frequency bands. The cut-off frequency of OMGMOS is about 8GHz, it should be able to be used in construction of RF circuits. The equivalent circuit model of OMGMOS is generated, and compared with the conventional MOS to prove the decreasing of noise figure essential due to the reduce of gate resistor. Large signal model is also generated for used in the design of nonlinear circuit. The optimization function provided by commercial microwave simulator (HP EEsof Libra & MDS) is adopted to fit the parameter of model with the measurement result. For increasing the convergence speed, the TSMC HSPICE model is referred as the initial guess. The OMGMOS is also use to implement a low noise amplifier and mixer operating at 430MHz. Two stages common source amplifier configuration is adopted in the LNA design. Source series inductor feedback is used to provide better stability and better match characteristic. The measured of low noise amplifier shows 17dB gain, and noise figure in 400~440MHz is about 10dB, which is due to extra parasitic substrate loss. A dual gate mixer configuration is used to generate intermediate frequency of 41MHz. Under bias condition of drain voltage is 5V, and 4V and 2.6V at first and second gate respectively. The measured conversion loss is 13dB, because the extra loss and mismatch caused by the parasitic resistance and inductance, the measurement loss is greater than designed value.
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